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<TITLE> School </TITLE>

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<H1> School Stuff </H1>


<UL>
	<LI> <!WA0><!WA0><!WA0><A HREF="#research">Research work</A>
		<!WA1><!WA1><!WA1><IMG SRC="http://www.cs.washington.edu/research/projects/lis/www/chinook/chinook-qtr.gif">
	<LI> <!WA2><!WA2><!WA2><A HREF="#publication">Publication list</A>
	<LI> My advisor <!WA3><!WA3><!WA3><A HREF="http://www.cs.washington.edu/homes/gaetano"> Gaetano Borriello</A>.
		<!WA4><!WA4><!WA4><IMG SRC="http://www.cs.washington.edu/homes/chou/pic/gae.gif">
	<LI> <!WA5><!WA5><!WA5><A HREF="http://www.cs.washington.edu/homes/ortega/431/431.html"> My office </A>
</UL>

<HR>

<H2><A NAME="research">Research Work</A></H2>


<P>
I am working on the <!WA6><!WA6><!WA6><A
HREF="http://www.cs.washington.edu/research/projects/lis/chinook/www/index.html"
>Chinook </A> project, which is a CAD tool for embedded systems.
I have worked on
<UL>
  <LI> synthesis of glue logic and driver routine customization
	  for microcontrollers with (parallel) I/O ports.
	This is joint work with Ross Ortega and Gaetano (my advisor).
   <UL>
     <LI> The official publication is in
	  <!WA7><!WA7><!WA7><a href="ftp://shrimp.cs.washington.edu/pub/chou/iccad92.ps.Z">
	   ICCAD-92 </a>.  This was implemented and demo'ed at DAC
	   in San Diego, CA in June 1994.
     <LI> We added memory-mapped I/O and presented it at
	<!WA8><!WA8><!WA8><a href="ftp://shrimp.cs.washington.edu/pub/chou/hscd92.ps.Z">
	the 1st workshop on HW/SW Co-Design </a>
	in Estes Park, CO in September 1992.  This paper was submitted
	as a proposal but not published in the proceedings.
   </UL>
  <LI> static scheduling techniques for meeting timing constraints
	   in software.
   <UL>
     <LI> The overview is described in
	   <!WA9><!WA9><!WA9><a href="ftp://shrimp.cs.washington.edu/pub/chou/micro94.ps.Z">
	   IEEE Micro</a>.  This is co-authored with Elizabeth Walkup and
	   Gaetano.
     <LI> The algorithm in
	   <!WA10><!WA10><!WA10><a href="ftp://shrimp.cs.washington.edu/pub/chou/dac94.ps.Z">
	   DAC-94</a> handles fixed delay values and mode transitions.
     <LI> The paper submitted to
	   <!WA11><!WA11><!WA11><a href="ftp://shrimp.cs.washington.edu/pub/chou/intervalsched.ps.Z">
	   DAC-95</a>
	   handles delay ranges, not just worst case delays.
	   It includes heuristics for finding short feasible schedules.
   </UL>
</UL>

In progress:
<UL>
	<LI> advanced interface synthesis using memory mapping and
		bandwidth transformation.
	<LI> code generation and timing estimation
	<LI> putting everything together into a program people can really
		use.
</UL>


<HR>

<H2><A NAME="publication">Publication List</A></H2>

<DL>
	<DT> Pai Chou, Ross Ortega, Gaetano Borriello, <DD>
	<!WA12><!WA12><!WA12><a href="ftp://shrimp.cs.washington.edu/pub/chou/iccad92.ps.Z">
	     "Synthesis of the Hardware/Software Interface in
	      Microcontroller-Based Systems," </a>
	     <I> Proceedings of the IEEE/ACM International Conference on
	      Computer-Aided Design</I>, Santa Clara, CA, November 1992.
	      pp.488-495.
	      <P>

	<DT> Pai Chou, Gaetano Borriello, <DD>
	<!WA13><!WA13><!WA13><a href="ftp://shrimp.cs.washington.edu/pub/chou/dac94.ps.Z">
	     "Software Scheduling in the Co-Synthesis of
	     Reactive Real-Time Systems," </a>
	     in <I> Proceedings of the Design Automation
	     Conference</I>, San Diego, CA, June 1994. pp.1-4.<P>

	<DT> Pai Chou, Elizabeth Walkup, Gaetano Borriello, <DD>
	<!WA14><!WA14><!WA14><a href="file://ftp.cs.washington.edu/tr/1994/09/UW-CSE-94-09-04.PS.Z">
	     "Scheduling Issues in the Co-Synthesis of
	     Reactive Real-Time Systems," </a>
	     <I> IEEE Micro </I>, August 1994. pp.37-47.
	     Also appeared as Technical Report 94-09-04,
	     Dept. of Computer Science and Engineering,
	     University of Washington, Seattle, WA  98195.<P>

	<DT> Pai Chou, Gaetano Borriello, <DD>
	<!WA15><!WA15><!WA15><a href="ftp://shrimp.cs.washington.edu/pub/chou/dac95.ps.Z">
	     "Interval Scheduling: Fine Grained Code Scheduling
	     for Embedded Systems," </a>
	     in <I>DAC-95.</I><P>

	<DT> Pai Chou, Ross Ortega, Gaetano Borriello, <DD>
	<!WA16><!WA16><!WA16><a href="ftp://shrimp.cs.washington.edu/pub/chou/isss95.ps.Z">
		"The Chinook Hardware/Software Co-Synthesis System,"</A>
		International Symposium on System Synthesis,
		Cannes, France, September 13-15, 1995.  Also appears as
	<!WA17><!WA17><!WA17><a href="file://ftp.cs.washington.edu/tr/1995/03/UW-CSE-95-03-04.PS.Z">
		UW-CSE Tech.Report 95-03-04. </a>
		<P>

	<DT> Pai Chou, Ross Ortega, Gaetano Borriello, <DD>
	<!WA18><!WA18><!WA18><a href="ftp://shrimp.cs.washington.edu/pub/chou/iccad95.ps.Z">
		"Interface Co-Synthesis Techniques for Embedded Systems"</a>,
		in <I>ICCAD-95.</I> pp.280--287.<P>

        <DT>Gaetano Borriello, Pai Chou, Ross Ortega, <DD>
        <!WA19><!WA19><!WA19><a href="ftp://shrimp.cs.washington.edu/pub/chou/nato.ps.Z">
        "Embedded System Co-Design: Towards Portability and Rapid
        Integration,"</a> <I>Hardware/Software Co-Design</I>,
        M.G. Sami and G. De Micheli, EDs., Kluwer Aacademic Publishers,
        1995.
        <P>

</DL>

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<I> Last updated
Thu Aug  8 16:48:18 PDT 1996
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